Answer: Looks like this idea is no good, peltier effect is smaller at lower temperatures.

https://www.rug.nl/research/portal/files/35731214/ncomms11525.pdf

Problem: qubits need to be cooled.

Solution: Why not build nano scale peltier cooling devices directly on the chip? Has this been tried? According to wikipedia a common design for macro scale devices use P-type and N-type silicon. They go onto say that a temperature difference of 70C can be expected across the device. So, \(300K / 70K\) is about 5 stages of cooling.

Then put the qubit in the middle, shuttle the heat away and presto, room temperature quantum computers?

Maybe a closed geometry?